Location: Bay Area (Onsite or Hybrid)

About Velaura AI

Velaura AI is building the next generation of compute for physical and embodied AI, spanning robotics, autonomous mobile robots (AMRs), and drones.
We believe the future of AI will not be defined by cloud compute alone, but by systems that can perceive, reason, and act in the real world — under tight power, latency, and reliability constraints.

Our architecture brings together:

• real-time physical world modeling
• transformer-based reasoning
• system-level hardware/software co-design to enable a new class of intelligent machines.

The Role

We are looking for a SoC Architect to help define the architecture of Velaura’s next-generation silicon platform.
This role sits at the intersection of system architecture, silicon design, and real-world deployment. You will work across the full stack — from external interfaces and data flows to on-chip fabrics, memory systems, and compute partitioning.

You will help answer fundamental questions such as:

• How should real-time sensor processing, AI inference, and control loops map onto silicon?
• What are the right trade-offs between latency, bandwidth, and power across the system?
• How do we design an SoC that is equally effective in cloud-connected and edge-deployed robotic systems?

What You’ll Do

• Define end-to-end SoC architecture for physical AI systems
• Drive HW/SW co-design, working closely with AI, systems, and software teams
• Architect dataflows and interconnects across compute, memory, and I/O
• Design and optimize:
  • on-chip fabrics and interconnects
  • memory hierarchy and controllers
  • QoS and latency-sensitive traffic handling
• Balance performance, power, and real-time constraints across the system
• Collaborate on workload characterization and system-level tradeoffs
• Contribute to a clean-sheet architecture targeting next-generation robotics platforms

What We’re Looking For

• Experience architecting or designing complex SoCs or system platforms
• Strong understanding of:
  • system dataflows and bottlenecks
  • memory systems and bandwidth management
  • on-chip interconnects / fabrics
• Familiarity with real-time or latency-sensitive systems
• Solid grounding in HW/SW co-design principles
• Awareness of low-power design tradeoffs
• 5+ years of relevant experience

Bonus (not required):

• Experience with robotics, autonomous systems, or edge AI platforms
• Exposure to AI/ML workloads or accelerators

Why This Role

This is an opportunity to work on a clean-sheet architecture for one of the hardest problems in computing: building efficient, real-time compute systems for machines that operate in the physical world.
You’ll be part of a small, highly experienced team tackling first-principles problems at the intersection of AI, systems, and silicon.

If you enjoy thinking about systems end-to-end — from sensors to silicon to software — and want to build something fundamentally new, we’d love to talk.

Velaura is an Equal Opportunity Employer that is committed to inclusion and diversity. Qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, disability or protected veteran status. We also take affirmative action to offer employment opportunities to minorities, women, individuals with disabilities, and protected veterans.

Velaura is committed to working with qualified individuals with physical or mental disabilities. Applicants who would like to contact us regarding the accessibility of our website or who need special assistance or a reasonable accommodation for any part of the application or hiring process may contact us at: careers@velaura.ai. This contact information is for accommodation requests only. Evaluation of requests for reasonable accommodation will be determined on a case-by-case basis.