Location: Bangalore, India
Work Arrangement: Onsite

Role Overview

As a Custom Characterization Engineer at Velaura AI, you will develop and deliver high-quality standard cell timing, power, and noise models for advanced semiconductor technologies. You will drive characterization methodologies, automation, and model validation while working closely with circuit design, layout, STA, and CAD teams to ensure robust, silicon-accurate library deliverables. This role offers the opportunity to shape next-generation characterization flows and contribute to cutting-edge AI and high-performance computing products.

Responsibilities

• Own the characterization and quality assurance of standard cell libraries across advanced technology nodes, including FinFET and Gate-All-Around (GAA).
• Develop, improve, and optimize standard cell characterization methodologies to deliver high-quality timing, power, and noise models.
• Generate and validate Liberty (.lib) views including NLDM, CCS, ECSM, and LVF models, with silicon and hardware correlation.
• Develop and maintain characterization, simulation, regression, and automation flows to improve productivity and model quality.
• Perform statistical verification and Monte Carlo analysis using Solido, Spectre FMC, or accelerated sigma simulation methodologies.
• Collaborate with circuit and layout teams to optimize standard cells for performance, power, area (PPA), layout-dependent effects (LDE), coloring compliance, and pin accessibility.
• Drive innovative characterization solutions aligned with Velaura AI’s technology roadmap and customer requirements.
• Partner with Circuit Design, Physical Design, STA, CAD, and Product Engineering teams to deliver high-quality library releases.

Required Qualifications

• 5+ years of experience in characterization of standard cell libraries for advanced process technologies.
• Hands-on experience with deep submicron, FinFET, and GAA technologies.
• Expertise in Liberty model generation and validation, including NLDM, CCS, ECSM, and LVF.
• Experience developing characterization automation, regression, and quality assurance frameworks.
• Proficiency with circuit simulation tools such as HSPICE, PrimeSim XA, or Spectre.
• Experience with statistical characterization and Monte Carlo simulation methodologies.
• Exposure to parasitic extraction using StarRC or Quantus.
• Working knowledge of transistor-level standard cell circuit design and optimization.

Preferred Qualifications

• Master’s degree in Electrical Engineering, Electronics Engineering, or a related field.
• Understanding of transistor-level circuit design and PPA optimization for standard cells including latches, flip-flops, multiplexers, AOI/OAI, XOR/XNOR, encoders, decoders, level shifters, and arithmetic cells.
• Strong understanding of Layout Dependent Effects (LDE), advanced-node device physics, and manufacturing-aware design.
• Good understanding of Static Timing Analysis (STA), Liberty (.lib) modeling, and flip-flop timing.
• Knowledge of ASIC implementation and sign-off methodologies.
• Programming and automation experience using Python, Tcl, or Perl.
• Experience with low-power library characterization and advanced Liberty modeling features.
• Exposure to custom circuit design and standard cell layout optimization.
• Excellent communication, collaboration, analytical, and problem-solving skills, with a strong sense of ownership and the ability to deliver under demanding project schedules.
• Background in standard cell characterization and library development; timing, power, and noise model generation; advanced-node technologies including Deep Submicron, FinFET, and GAA; or statistical characterization and model validation.

Compensation & Benefits

At Velaura, we believe exceptional talent deserves exceptional rewards. Compensation for this role includes a competitive base salary, performance-based incentives, and equity participation, allowing team members to share in the company’s long-term success.

The base pay range for this role is between $125k to $275k, and your base pay will depend on your skills, qualifications, experience, and location
In addition to compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage; paid time off; flexible work arrangements; professional development opportunities; and other benefits designed to support the well-being and growth of our team.

Velaura is committed to pay equity and transparency and regularly benchmarks compensation to ensure we remain competitive in the market.

Why Velaura?

Velaura is building next-generation compute technology for cloud, edge, and Physical AI. Our solutions will enable robots, autonomous systems, drones, and other intelligent machines to operate efficiently in the physical world.

This is an opportunity to help build foundational technology at a time when the industry is undergoing fundamental change. You will work alongside experienced leaders, architects, engineers, and operators who have delivered industry-defining products across mobile, cloud, semiconductor, and AI platforms.

If you enjoy solving difficult problems, working across disciplines, and helping shape the future of Physical AI, we would love to hear from you.

Equal Employment Opportunity and Accommodations

Velaura is an Equal Opportunity Employer that is committed to inclusion and diversity.
Qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, disability or protected veteran status. We also take affirmative action to offer employment opportunities to minorities, women, individuals with disabilities, and protected veterans.

Velaura is committed to working with qualified individuals with physical or mental disabilities. Applicants who would like to contact us regarding the accessibility of our website or who need special assistance or a reasonable accommodation for any part of the application or hiring process may contact us at: careers@velaura.ai. This contact information is for accommodation requests only. Evaluation of requests for reasonable accommodation will be determined on a case-by-case basis.